MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 55

TXRX ISM SUB-GHZ ULP 32QFN

MRF89XA-I/MQ

Manufacturer Part Number
MRF89XA-I/MQ
Description
TXRX ISM SUB-GHZ ULP 32QFN
Manufacturer
Microchip Technology
Datasheets

Specifications of MRF89XA-I/MQ

Package / Case
32-WFQFN Exposed Pad
Frequency
863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
Data Rate - Maximum
200kbps
Modulation Or Protocol
FSK, OOK
Applications
ISM
Power - Output
12.5dBm
Sensitivity
-113dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
Interface Type
SPI
Noise Figure
- 112 dBc
Output Power
- 8.5 dBm, + 12.5 dBm
Operating Supply Voltage
2.1 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Data Rate
256 Kbps
Maximum Supply Current
25 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF89XA-I/MQ
Manufacturer:
MICROCHIP
Quantity:
12 000
2.20.3
REGISTER 2-31:
© 2010 Microchip Technology Inc.
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7
bit 6-5
bit 4
bit 3
bit 2-1
bit 0
PKTLENF
R/W-0
PACKET CONFIGURATION
REGISTER DETAILS
PKTLENF: Packet Length Format bit
1 = Variable Length Format
0 = Fixed Length Format (default)
PRESIZE<1:0>: Preamble Size bits
These bits indicate the size of the preamble bits to be transmitted.
11 = 4 bytes
10 = 3 bytes (default)
01 = 2 bytes
00 = 1 byte
WHITEON: Whitening/Dewhitening Process Enable bit
1 = ON
0 = OFF (default)
CHKCRCEN: Check (or Calculation) CRC Enable bit
1 = ON (default)
0 = OFF
ADDFIL<1:0>: Address Filtering bits
These bits determine the mode of filter out the addresses of received packet
11 = Node Address & 0x00 & 0xFF Accepted; otherwise, rejected
10 = Node Address & 0x00 Accepted; otherwise, rejected
01 = Node Address Accepted; otherwise, rejected
00 = OFF (default)
STSCRCEN: Status Check CRC Enable bit
This bit checks the status/result of the CRC of the current packet (read-only).
1 = OK
0 = Not OK
R/W-1
PRESIZE<1:0>
PKTCREG: PACKET CONFIGURATION REGISTER
(ADDRESS:0x1E) (POR:0x68)
W = Writable bit
‘1’ = Bit is set
R/W-1
WHITEON
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CHKCRCEN
R/W-1
R/W-0
ADDFIL<1:0>
x = Bit is unknown
MRF89XA
R/W-0
DS70622B-page 55
STSCRCEN
R/W-0
bit 0

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