ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 137
ML610Q412P-NNNTB03A7
Manufacturer Part Number
ML610Q412P-NNNTB03A7
Description
MCU 8BIT 16K FLASH 120-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q411P-NNNTB03A7.pdf
(36 pages)
3.ML610Q411P-NNNTB03A7.pdf
(381 pages)
Specifications of ML610Q412P-NNNTB03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
625kHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
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10.2.8
Address: 0F039H
Access: R/W
Access size: 8 bits
Initial value: 00H
TM2C is a special function register (SFR) that functions as an 8-bit binary counter.
When write operation to TM2C is performed, TM2C is set to “00H”. The data that is written is meaningless.
In 16-bit timer mode and 16-bit timer frequency measurement mode, if write operation is performed to either the
low-order TM2C or high-order TM3C, both the low order and the high order are set to “0000H”.
During timer operation, the contents of TM2C may not be read depending on the conditions of the timer clock and the
system clock.
Table 10-3 shows whether a TM2C read is enabled or disabled during timer operation for each condition of the timer
clock and system clock.
Initial value
TM2C
R/W
External clock
Timer clock
Timer 2 Counter Register (TM2C)
HTBCLK
HTBCLK
LSCLK
LSCLK
T2CK
T2C7
R/W
7
0
Table 10-3 TM2C Read Enable/Disable during Timer Operation
System clock
T2C6
R/W
SYSCLK
6
0
HSCLK
HSCLK
HSCLK
LSCLK
LSCLK
LSCLK
T2C5
R/W
5
0
Read enabled
Read enabled. However, to prevent the reading of undefined
data during incremental counting, read TM2C twice and check
that the results match.
Read disabled
Read enabled
Read disabled
T2C4
R/W
10 – 10
0
4
ML610Q411/ML610Q412/ML610Q415 User’s Manual
T2C3
R/W
TM2C read enable/disable
3
0
T2C2
R/W
2
0
T2C1
R/W
1
0
Chapter 10 Timers
T2C0
R/W
0
0
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