ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 58

• Manufacturer Part Number: ML610Q412P-NNNTB03A7
• Description: MCU 8BIT 16K FLASH 120-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q412P-NNNTB03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 625kHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.3.3.2
When the CPU is operating with a high-speed clock and the STP bit of SBYCON is set to “1” with the stop code
acceptor enabled, the STOP mode is entered and high-speed oscillation and low-speed oscillation stop.
When the NMI interrupt request or the interrupt-enabled (the interrupt enable flag is “1”) P00 to P03 interrupt request
is issued, the STP bit is set to “0” and the low-speed and high-speed oscillation restart.
When an interrupt request is issued, the STOP mode is released after the elapse of the high-speed oscillation start time
(T
program run mode, and the high-speed clocks (OSCLK and HSCLK) restart supply to the peripheral circuits.
The low-speed clock (LSCLK) restarts supply to the peripheral circuits after the elapse of the low-speed oscillation
start time (T
For the high-speed oscillation start time (T
Characteristics” Section in Appendix C.
Figure 4-4 shows the operation waveforms in STOP mode when CPU operates with the high-speed clock.
Note:
The STOP mode is entered two cycles after the instruction that sets the STP bit to “1” and up to two instructions are
executed during the period between STOP mode release and a transition to interrupt processing. Therefore, place two
NOP instructions next to the instruction that set the STP bit to “1”.
RC
) and the high-speed clock (OSCLK) oscillation stabilization time (8192-pulse count), the mode is returned to the
Figure 4-4 Operation Waveforms in STOP Mode When CPU Operates with High-Speed Clock
High-speed oscillation
Low-speed oscillation
SBYCON.STP bit
OSCLK, HSCLK
Interrupt request
STOP Mode When CPU Operates with High-Speed Clock
XTL
) and low-speed clock (LSCLK) oscillation settling time (8192 count).
waveform
waveform
SYSCLK
LSCLK
Program operating mode
High-speed oscillation waveform
OSCLK and HSCLK waveforms
HSCLK waveform
RC
) and low-speed oscillation start time (T
4 – 13
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Hiz
STOP mode
T
RC
T
XTL
Chapter 4 MCU Control Function
High-speed oscillation
8192-pulse count
8192-pulse count
Low-speed oscillation waveform
High-speed oscillation waveform
OSCLK and HSCLK waveforms
Program operating mode
HSCLK waveform
XTL
), see the “Electrical