ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 96

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ML610Q412P-NNNTB03A7

Manufacturer Part Number
ML610Q412P-NNNTB03A7
Description
MCU 8BIT 16K FLASH 120-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q412P-NNNTB03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
625kHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
ROHM
Quantity:
750
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
6.3.2.3
The high-speed clock generation circuit is activated in 500Hz RC oscillation mode by power-on reset generation.
As a result of the occurrence of power-on reset, the circuit goes into system reset mode and then shifts to program
operating mode after the elapse of the high-speed RC oscillation start time (T
(Count: 8192) of the high-speed oscillation clock (OSCLK) and at the same time, a high-speed clock (HSCLK) is
supplied to the peripheral circuits.
Figure 6-6 shows the waveforms of the high-speed clock generation circuit at power on. For the high-speed RC
oscillation start time (T
The high-speed clock generation circuit allows selection of an oscillation mode and start/stop of oscillation by using the
frequency control registers 0 and 1 (FCON0 and FCON1).
Oscillation can be started by setting the ENOSC bit to “1” after selecting a high-speed oscillation mode in FCON0 and
a high-speed oscillation frequency. After the start of oscillation, HSCLK starts supply of a clock to the peripheral
circuits following the elapse of the high-speed oscillation start period (T
the high-speed oscillation clock.
The high-speed clock generation circuit stops oscillation in STOP mode. When the STOP mode is released by external
interrupt, HSCLK supplies clocks to peripheral circuits following the elapse of the high-speed oscillation start period
(T
of 128 clock pulses.
RC
) and the oscillation stabilization period of the high-speed clock. The oscillation stabilization period is the duration
Operation of High-Speed Clock Generation Circuit
Figure 6-6 Operation of High-Speed Clock Generation Circuit at Power-On
High-speed oscillation
Power supply V
High-speed clock
RC
clock waveform
), see Appendix C, “Electrical Characteristics”.
System clock
SYSCLK
RESET
HSCLK
DD
T
RC
: Oscillation start time
High-speed oscillation
Count: 8192
High-speed oscillation clock waveform
6 – 11
ML610Q411/ML610Q412/ML610Q415 User’s Manual
CPU start
HSCLK waveform
SYSCLK waveform
RC
) and the oscillation stabilization period of
Chapter 6 Clock Generation Circuit
RC
) and the oscillation stabilization time

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