ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 149
ML610Q412P-NNNTB03A7
Manufacturer Part Number
ML610Q412P-NNNTB03A7
Description
MCU 8BIT 16K FLASH 120-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q411P-NNNTB03A7.pdf
(36 pages)
3.ML610Q411P-NNNTB03A7.pdf
(381 pages)
Specifications of ML610Q412P-NNNTB03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
625kHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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(4) Set “FFH” to both TM2D register and TM3D register.
(5) Clear both TM2C register and TM3C register to “00H”.
(6) Set T2RUN bit (bit0 of TM2CON1 register) to “1” to start counting the timer.
(7) On the condition of (T23MFM ビット=="1") & ((TM23M16 ビット=="1") & (T2RUN ビット=="1"), the
count-up starts at rising edge of 64Hz clock signal.
(8) The count-up stops at the falling edge of the next timer clock (HTBCLK) after 437C signal becomes “1”.
Also, at the same time, T2RUN bit and T2STAT bit become “0” and the interrupt signal TM3INT activates.
(9) After checking T2STAT bit or TM3INT interrupt occurs, read out the data (N1) of TM2C register and
TM3C register.
For example of utilizing N1, to occur 9600Hz timer interrupt.
Assuming the HTBCLK is 600kHz,
As (437 / 32768) sec is equivalent to 128 clocks at 9600Hz (more precisely, 9598Hz), a division of the count N1
by 128 equals frequency ratio (N2) between the frequency of HTBCLK and 9600Hz.
Because 128 = 2
This indicates that 9600Hz is about 62 times the cycle of HTBCLK.
Therefore, if 3DH(=3EH-1) set to the timer register and the timer start counting, the cycle of TMnINT interrupt
that can occur every 62 counts of HTBCLK is:
N1 = 600000 * 437 / 32768
N2 = 8001(Decimal) / 128 (Decimal)
tTMnINT = (1 / 600000) * 62 = 0.10333ms (9677Hz)
= 8001 (Decimal)
= 1F41 (Hexadecimal)
= 0001 1111 0100 0001 (Binary)
=0001 1111 0 (Binary)
=3E (Hexadecimal)
=62 (Decimal)
7
, that caluculation can be determined by truncating the righthand seven digits of N1(Binary).
10 – 22
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Chapter 10 Timers
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