ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 160

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ML610Q412P-NNNTB03A7

Manufacturer Part Number
ML610Q412P-NNNTB03A7
Description
MCU 8BIT 16K FLASH 120-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q412P-NNNTB03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
625kHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
ROHM
Quantity:
750
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
After the P0RUN bit is set to “1”, counting starts in synchronization with the PWM clock. This causes an error of up
to 1 clock pulse to the time the first PWM interrupt is issued. The PWM interrupt period from the second time is
fixed.
Figure 11-2 shows the operation timing of PWM0.
Note:
Even if “0” is written to the P0RUN bit, counting operation continues up to the falling edge (the PWM0 status flag
(P0STAT) is in a “1” state) of the next PWM clock pulse. Therefore, the PWM0 interrupt (PW0INT) may occur.
PWM0* (negative logic)
PWM0* (Positive logic)
Write PW0CH
Write PW0CL
PW0DBUF
PW0PBUF
PW0CH/L
PW0CH/L
PW0DH/L
PW0PH/L
P0STAT
P0STAT
PW0INT
P0RUN
P0RUN
P0FLG
P0FLG
P0CK
P0CK
Figure 11-2 (1/2) Operation Timing Diagram of PWM0
Figure 11-2 (2/2) Operation Timing Diagram of PWM0
XXXX
2000 2001 2002 2003
0000
A000
A000
8000
8000
0001 0002
11 – 9
7777
T
BBBB
ML610Q411/ML610Q412/ML610Q415 User’s Manual
PWD
2004
7FFF 8000 8001
T
PWP
BBBB
A000
7777
8000
2005
8002
2006
A000 A000 0000 0001
BBBB
7777
A000
8000
2007 2008
Chapter 11 PWM
7777
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