LFE2M20E-6FN256C LATTICE SEMICONDUCTOR, LFE2M20E-6FN256C Datasheet - Page 30

• Manufacturer Part Number: LFE2M20E-6FN256C
• Description: IC, LATTICEECP2M FPGA, 420MHZ, FPBGA-256
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: LatticeECP2Mr

Specifications of LFE2M20E-6FN256C

• No. Of Logic Blocks: 19000
• No. Of Macrocells: 10500
• No. Of Speed Grades: 6
• No. Of I/o's: 140
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Total Ram Bits: 1217Kbit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
IPexpress™
The user can access the sysDSP block via the ispLEVER IPexpress tool, which provides the option to configure
each DSP module (or group of modules) or by direct HDL instantiation. In addition, Lattice has partnered with The
MathWorks
ispLEVER to dramatically shorten the DSP design cycle in Lattice FPGAs.
Optimized DSP Functions
Lattice provides a library of optimized DSP IP functions. Some of the IP cores planned for the LatticeECP2/M DSP
include the Bit Correlator, Fast Fourier Transform, Finite Impulse Response (FIR) Filter, Reed-Solomon Encoder/
Decoder, Turbo Encoder/Decoder and Convolutional Encoder/Decoder. Please contact Lattice to obtain the latest
list of available DSP IP cores.
Resources Available in the LatticeECP2/M Family
Table 2-9 shows the maximum number of multipliers for each member of the LatticeECP2/M family. Table 2-10
shows the maximum available EBR RAM Blocks in each LatticeECP2/M device. EBR blocks, together with Distrib-
uted RAM can be used to store variables locally for fast DSP operations.
Table 2-9. Maximum Number of DSP Blocks in the LatticeECP2/M Family
Table 2-10. Embedded SRAM in the LatticeECP2/M Family
ECP2M100
ECP2M20
ECP2M35
ECP2M50
ECP2M70
ECP2-12
ECP2-20
ECP2-35
ECP2-50
ECP2-70
ECP2-6
Device
®
to support instantiation in the Simulink
ECP2M100
DSP Block
ECP2M20
ECP2M35
ECP2M50
ECP2M70
ECP2-12
ECP2-20
ECP2-35
ECP2-50
ECP2-70
ECP2-6
Device
18
22
22
24
42
3
6
7
8
6
8
EBR SRAM Block
9x9 Multiplier
®
tool, a graphical simulation environment. Simulink works with
2-27
144
176
176
192
336
114
225
246
288
24
48
56
64
48
64
12
15
18
21
60
66
3
LatticeECP2/M Family Data Sheet
Total EBR SRAM
18x18 Multiplier
(Kbits)
1106
1217
2101
4147
4534
5308
168
221
277
332
387
12
24
28
32
72
88
24
32
88
96
55
36x36 Multiplier
Architecture
18
22
22
24
42
3
6
7
8
6
8