MT47H64M16HR-3 IT:H Micron Technology Inc, MT47H64M16HR-3 IT:H Datasheet - Page 31

• Manufacturer Part Number: MT47H64M16HR-3 IT:H
• Description: DRAM Chip DDR2 SDRAM 1G-Bit 64Mx16 1.8V 84-Pin FBGA Tray
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H64M16HR-3 IT:H

• Density: 1 Gb
• Maximum Clock Rate: 667 MHz
• Package: 84FBGA
• Operating Supply Voltage: 1.8 V
• Maximum Random Access Time: 0.45 ns
• Operating Temperature: -40 to 85 °C
• Organization: 64Mx16
• Address Bus: 16b
• Access Time (max): 450ps
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 135mA
• Pin Count: 84
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Table 11: DDR2 I
Notes: 1–7 apply to the entire table
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
Parameter/Condition
Operating one bank active-
precharge current:
(I
HIGH between valid commands; Address bus in-
puts are switching; Data bus inputs are switching
Operating one bank active-read-precharge
current: I
0;
MIN (I
HIGH between valid commands; Address bus in-
puts are switching; Data pattern is same as I
Precharge power-down current: All banks
idle;
and address bus inputs are stable; Data bus in-
puts are floating
Precharge quiet standby
current: All banks idle;
HIGH, CS# is HIGH; Other control and address
bus inputs are stable; Data bus inputs are floating
Precharge standby current: All banks idle;
t
control and address bus inputs are switching; Da-
ta bus inputs are switching
Active power-down current: All banks open;
t
address bus inputs are stable; Data bus inputs
are floating
Active standby current: All banks open;
t
t
tween valid commands; Other control and ad-
dress bus inputs are switching; Data bus inputs
are switching
Operating burst write current: All banks
open, continuous burst writes; BL = 4, CL = CL
(I
(I
tween valid commands; Address bus inputs are
switching; Data bus inputs are switching
CK =
CK =
CK =
RP =
DD
DD
DD
t
CK =
),
), AL = 0;
),
t
t
CK =
t
t
t
t
t
DD
RAS =
RP (I
RP =
CK (I
CK (I
CK (I
t
),
CK (I
OUT
t
DD
t
RCD =
DD
DD
DD
t
CK (I
RP (I
t
); CKE is HIGH, CS# is HIGH be-
t
RAS MIN (I
DD
); CKE is HIGH, CS# is HIGH; Other
); CKE is LOW; Other control and
),
CK =
= 0mA; BL = 4, CL = CL (I
t
),
RAS =
DD
DD
t
t
RCD (I
RC =
); CKE is LOW; Other control
); CKE is HIGH, CS# is HIGH be-
t
DD
CK (I
t
CK =
t
Specifications and Conditions (Die Revision H)
RAS MAX (I
t
DD
RC (I
t
DD
DD
CK =
); CKE is HIGH, CS# is
),
); CKE is HIGH, CS# is
t
CK (I
t
DD
RAS =
t
CK (I
),
DD
t
RAS =
DD
),
DD
t
RAS MAX
t
),
RC =
); CKE is
DD
t
), AL =
RAS
t
RC
DD4W
Symbol
I
I
I
I
I
I
I
DD4W
DD3Pf
DD3Ps
I
I
DD2Q
DD2N
DD3N
DD2P
DD0
DD1
31
Configuration
Electrical Specifications – I
x4, x8, x16
MR12 = 0
MR12 = 1
Slow exit
Fast exit
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4 ,x8
x16
x16
x16
x16
x16
x16
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x4, x8, x16 DDR2 SDRAM
-187E
100
100
115
155
200
85
35
40
40
45
30
10
40
45
7
-25E/
125
160
-25
© 2004 Micron Technology, Inc. All rights reserved.
65
80
75
95
24
26
28
30
20
10
33
35
7
DD
-3E/
115
135
Parameters
60
75
70
90
24
26
24
26
15
10
30
32
-3
7
Units
mA
mA
mA
mA
mA
mA
mA
mA