Z85C3010PSG Zilog, Z85C3010PSG Datasheet - Page 279

• Manufacturer Part Number: Z85C3010PSG
• Description: IC 10MHZ Z8500 CMOS SCC 40-DIP
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3010PSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3934; Z85C3010PSG

Application Note
Technical Considerations When Implementing LocalTalk Link Access Protocol
0000044d
0000044d f5
0000044e d5
0000044f e5
00000450 dbe9
00000452 2aWwww
00000455 77
00000456 23
00000457 22Www
0000045a ed5bWwww
0000045e af
0000045f ed52
00000461 c2Wwww
00000464 21Wwww
00000467 cbc6
00000469
00000469 3e38
0000046b d3e8
0000046d e1
0000046e d1
0000046f f1
00000470 fb
00000471 c9
00000472
00000472 f5
00000473 c5
00000474 e5
00000475 3e01
00000477 d3e8
00000479 dbe8
0000047b e660
0000047d caWwww
00000480 21Wwww
00000483 cbce
00000485 c3Wwww
6-144
1131
1132
1133
1134
1135
1136
1137recint:
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153recexit:
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167;
1168;
1169;
1170;
1171
1172 spcond:
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
push
push
push
in
ld
ld
inc
ld
ld
xor
sbc
jp
ld
set
ld
out
pop
pop
pop
ei
ret
push
push
push
ld
out
in
and
jp
;
ld
set
jp
LISTING 3
af
de
hl
a,(scc_data)
hl,(rxpointer)
(hl),a
hl
(rxpointer),hl
de,(rxbufend)
a
hl,de
nz,recexit
hl,recerrflg
0,(hl)
a,038h
(scc_cont),a
hl
de
af
af
bc
hl;
a,01h
(scc_cont),a
a,(scc_cont)
01100000b
z,ok
hl,recerrflg
1,(hl)
crc_exit
;******************************
;receive int service routine.
;******************************
;save received character in receiver buffer
;to by rxpointer
;save af
;read scc data
;
;save it
;update pointer
;
;end of rx buffer
;reset cy
;
;if not zero,then receive
byte length is ok
;
;set bit0=1 maxfrmflg to indicate error
;because of max frame
size exceeded.
;reset highest ius
;restore af
;enable int
;return from int
;note ret and not reti is used for scc
;interrupts on the z80181.
;*********************************************
;special receive interrupt service routine
;*********************************************
“parity is special condition” bit is off.
special conditions are eof or rx overrun error.
crc error flag is valid only if eof is valid.
if frame is ok then recerrflg bit1=0, otherwise
;save af reg
;
;read rr1
;
;fetch receive error flag
;set bit1=1 for frame not ok
;check bit6 (crc) or bit5 (overrun)
UM010901-0601