KSZ8851-32MQLI Micrel Inc, KSZ8851-32MQLI Datasheet - Page 2

• Manufacturer Part Number: KSZ8851-32MQLI
• Description: IC CTLR MAC/PHY NON PCI 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8851-32MQLI

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 576-3630; KSZ8851-32MQLI

Features
• Integrated MAC and PHY Ethernet Controller fully
• Designed for high performance and high throughput
• Supports 10BASE-T/100BASE-TX
• Supports IEEE 802.3x full-duplex flow control and half-
• Supports DMA-slave burst data read and write transfers
• Supports IP Header (IPv4)/TCP/UDP/ICMP checksum
• Supports IPv6 TCP/UDP/ICMP checksum generation
• Automatic 32-bit CRC generation and checking
• Simple SRAM-like host interface easily connects to
• Supports multiple data frames for transmit and receive
• Supports both Big- and Little-Endian processors
• Larger internal memory with 12K Bytes for RX FIFO and
• Efficient architecture design with configurable host
• Powerful and flexible address filtering scheme
• Optional to use external serial EEPROM configuration
• Single 25 MHz reference clock for both PHY and MAC
• HBM ESD Rating 6kV
Power Modes, Power Supplies, and Packaging
• Single 3.3V power supply with options for 1.8V, 2.5V
• Built-in integrated 3.3V or 2.5V to 1.8V low noise
• Enhanced power management feature with energy
• Comprehensive LED indicator support for link, activity,
• Low-power CMOS design
• Commercial Temperature Range: 0
• Industrial Temperature Range: –40
• Flexible package options available in 128-pin PQFP
• Pin compatible with existing KSZ8841-16/32MQL and
August 2009
Micrel, Inc.
compliant with IEEE 802.3/802.3u standards
applications
duplex backpressure collision flow control
generation and checking
and checking
most common embedded MCUs.
without address bus and byte-enable signals
6K Bytes for TX FIFO. Programmable low, high and
overrun watermark for flow control in RX FIFO
interrupt schemes to minimize host CPU overhead and
utilization
for both KSZ8851-16MQL and KSZ8851-32MQL
and 3.3V VDD I/O
regulator for core and analog blocks
detect mode and power-down mode to ensure low-
power dissipation during device idle periods
full/half duplex, and 10/100 speed (4 LEDs)
– User programmable
KSZ8851-16/32MQL or 48-pin LQFP KSZ8851-16MLL
KSZ8842-16/32MQL in 128-pin
o
o
C to +85
C to +70
o
o
C
C
2
Additional Features
In addition to offering all of the features of a Layer 2
controller, the KSZ8851-16/32MQL offers:
• Flexible 8-bit, 16-bit and 32-bit generic host processor
• Supports to add two-byte before frame header in order
• Micrel LinkMD
• Wake-on-LAN functionality
• HP Auto MDI-X™ crossover with disable/enable option
• Ability to transmit and receive frames up to 2000 bytes
Network Features
• 10BASE-T and 100BASE-TX physical layer support
• Auto-negotiation: 10/100 Mbps full and half duplex
• Adaptive equalizer
• Baseline wander correction
Applications
• Video/Audio Distribution Systems
• High-end Cable, Satellite, and IP set-top boxes
• Video over IP and IPTV
• Voice over IP (VoIP) and Analog Telephone Adapters
• Industrial Control in Latency Critical Applications
• Home Base Station with Ethernet Connection
• Industrial Control Sensor Devices (Temperature,
• Security, Motion Control and Surveillance Cameras
Markets
• Fast Ethernet
• Embedded Ethernet
• Industrial Ethernet
• Embedded Systems
interfaces with same access time and single bus timing
to any I/O registers and RX/TX FIFO buffers
for IP frame content with double word boundary
determine cable length, diagnose faulty cables, and
determine distance to fault
– Incorporates Magic Packet™, network link state, and
wake-up frame technology
(ATA)
Pressure, Levels, and Valves)
®
cable diagnostic capabilities to
KSZ8851-16/32 MQL/MQLI
M9999-083109-2.0