KSZ8851-32MQLI Micrel Inc, KSZ8851-32MQLI Datasheet - Page 30

• Manufacturer Part Number: KSZ8851-32MQLI
• Description: IC CTLR MAC/PHY NON PCI 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8851-32MQLI

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 576-3630; KSZ8851-32MQLI

other stations' transmission (carrier sense deference).
To avoid jabber and excessive deference (as defined in the 802.3 standard), after a certain time, the KSZ8851M
discontinues the carrier sense and then raises it again quickly. This short silent time (no carrier sense) prevents other
stations from sending out packets thus keeping other stations in a carrier sense deferred state. If the port has packets to
send during a backpressure situation, the carrier sense type backpressure is interrupted and those packets are
transmitted instead. If there are no additional packets to send, carrier sense type backpressure is reactivated again until
chip resources free up. If a collision occurs, the binary exponential back-off algorithm is skipped and carrier sense is
generated immediately, thus reducing the chance of further collision and carrier sense is maintained to prevent packet
reception.
Address Filtering Function
The KSZ8851M supports 11 different address filtering schemes as shown in the following Table 3. The Ethernet
destination address (DA) field inside the packet is the first 6-byte field which uses to compare with either the host MAC
address registers (0x10 – 0x15) or the MAC address hash table registers (0xA0 – 0xA7) for address filtering operation.
The first bit (bit 40) of the destination address (DA) in the Ethernet packet decides whether this is a physical address if bit
40 is “0” or a multicast address if bit 40 is “1”.
August 2009
Micrel, Inc.
Item
1
2
3
4
5
6
7
8
Perfect
Inverse perfect
Hash only
Inverse hash
only
Hash perfect
(Default)
Inverse hash
perfect
Promiscuous
Hash only with
Multicast
address
passed
Filtering Mode RX All
Address
(Bit 4)
Receive Control Register (0x74 – 0x75): RXCR1
0
0
0
0
0
0
1
1
Inverse
(Bit 1)
RX
0
1
0
1
1
0
0
1
RX Physical
Address
(Bit 11)
1
1
0
0
1
1
0
0
RX Multicast
Address
30
(Bit 8)
1
1
0
0
0
0
0
0
All Rx frames are passed only if the DA exactly
matches the MAC address in MARL, MARM
and MARH registers.
All Rx frames are passed if the DA is not
matching the MAC address in MARL, MARM
and MARH registers.
All Rx frames with either multicast or physical
destination address are filtering against the
MAC address hash table.
All Rx frames with either multicast or physical
destination address are filtering not against the
MAC address hash table.
All Rx frames which are filtering out at item 3
(Hash only) only are passed in this mode.
All Rx frames are passed with Physical
address (DA) matching the MAC address and
to enable receive multicast frames that pass
the hash table when Multicast address is
matching the MAC address hash table.
All Rx frames which are filtering out at item 5
(Hash perfect) only are passed in this mode.
All Rx frames are passed without any
conditions.
All Rx frames are passed with Physical
address (DA) matching the MAC address hash
table and with Multicast address without any
conditions.
Description
KSZ8851-16/32 MQL/MQLI
M9999-083109-2.0