KSZ8851-32MQLI Micrel Inc, KSZ8851-32MQLI Datasheet - Page 50

• Manufacturer Part Number: KSZ8851-32MQLI
• Description: IC CTLR MAC/PHY NON PCI 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8851-32MQLI

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 576-3630; KSZ8851-32MQLI

0x0A – 0x0F: Reserved
Host MAC Address Registers: MARL, MARM and MARH
These Host MAC address registers are loaded starting at word location 0x1 of the EEPROM upon hardware reset. The
software driver can read or write these registers value, but it will not modify the original Host MAC address value in the
EEPROM. These six bytes of Host MAC address in external EEPROM are loaded to these three registers as mapping
below:
MARL[15:0] = EEPROM 0x1(MAC Byte 2 and 1)
MARM[15:0] = EEPROM 0x2(MAC Byte 4 and 3)
MARH[15:0] = EEPROM 0x3(MAC Byte 6 and 5)
The Host MAC address is used to define the individual destination address that the KSZ8851M responds to when
receiving frames. Network addresses are generally expressed in the form of 01:23:45:67:89:AB, where the bytes are
received from left to right, and the bits within each byte are received from right to left (LSB to MSB). For example, the
actual transmitted and received bits are on the order of 10000000 11000100 10100010 11100110 10010001 11010101.
These three registers value for Host MAC address 01:23:45:67:89:AB will be held as below:
MARL[15:0] = 0x89AB
MARM[15:0] = 0x4567
MARH[15:0] = 0x0123
Host MAC Address Register Low (0x10 – 0x11): MARL
The following table shows the register bit fields for Low word of Host MAC address.
Host MAC Address Register Middle (0x12 – 0x13): MARM
The following table shows the register bit fields for middle word of Host MAC address.
Host MAC Address Register High (0x14 – 0x15): MARH
The following table shows the register bit fields for high word of Host MAC address.
August 2009
Micrel, Inc.
Bit
6
5
4
3
2
1
0
Bit
15-0
Bit
15-0
-
-
0
-
0
0
0
-
-
Default Value
Default Value
Default Value
R/W
RO
RO
RO
RO
RO
RO
RO
R/W
RW
R/W
RW
Description
16-Bit data bus width
This bit value is loaded from either EEPROM or EEDI (pin 30, without EEPROM)
0: Not in 16-bit bus mode operation, 1: In 16-bit bus mode operation.
32-Bit data bus width
This bit is set when uses KSZ8851-32MQL device.
0: Not in 32-bit bus mode operation, 1: In 32-bit bus mode operation.
Reserved.
128-Pin Chip Package
To indicate chip package is 128-pin.
0: No, 1: Yes.
Reserved.
Reserved.
Reserved.
Description
MARL MAC Address Low
The least significant word of the MAC address.
Description
MARM MAC Address Middle
The middle word of the MAC address.
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KSZ8851-16/32 MQL/MQLI
M9999-083109-2.0