KSZ8851-32MQLI Micrel Inc, KSZ8851-32MQLI Datasheet - Page 59

• Manufacturer Part Number: KSZ8851-32MQLI
• Description: IC CTLR MAC/PHY NON PCI 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8851-32MQLI

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 576-3630; KSZ8851-32MQLI

Receive Control Register 2 (0x76 – 0x77): RXCR2
This register holds control information programmed by the CPU to control the receive function.
August 2009
Micrel, Inc.
Bit
8
7
6
5
4
3-2
1
0
Bit
15-5
4
3
2
1
0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
-
0x0
0x0
0x1
0x0
0x0
Default Value
0x0
Default Value
R/W
RW
RW
RW
RW
RW
RW
RW
RW
R/W
RO
RW
RW
RW
RW
RW
Description
RXMAFMA Receive Multicast Address Filtering with MAC Address Enable
When this bit is set, this bit enables the RX function to receive multicast address that pass
the MAC address filtering mechanism (see Address Filtering Scheme in Table 3 for
detail).
RXBE Receive Broadcast Enable
When this bit is set, the RX module receives all the broadcast frames.
RXME Receive Multicast Enable
When this bit is set, the RX module receives all the multicast frames (including broadcast
frames).
RXUE Receive Unicast Enable
When this bit is set, the RX module receives unicast frames that match the 48-bit Station
MAC address of the module.
RXAE Receive All Enable
When this bit is set, the KSZ8851M receives all incoming frames, regardless of the
frame’s destination address (see Address Filtering Scheme in Table 3 for detail).
Reserved
RXINVF Receive Inverse Filtering
When this bit is set, the KSZ8851M receives function with address check operation in
inverse filtering mode (see Address Filtering Scheme in Table 3 for detail).
RXE Receive Enable
When this bit is set, the RX block is enabled and placed in a running state.
When this bit is cleared, the receive process is placed in the stopped state upon
completing reception of the current frame.
Description
Reserved.
IUFFP IPV4/IPV6/UDP Fragment Frame Pass
When this bit is set, the KSZ8851M will pass the checksum check at receive side for
IPv4/IPv6 UDP frame with fragment extension header.
When this bit is cleared, the KSZ8851M will perform checksum operation based on
configuration and doesn’t care whether it’s a fragment frame or not.
RXIUFCEZ Receive IPV4/IPV6/UDP Frame Checksum Equal Zero
When this bit is set, the KSZ8851M will pass the filtering for Ipv4/Ipv6 UDP frame with
UDP checksum equal to zero.
When this bit is cleared, the KSZ8851M will drop Ipv4/Ipv6 UDP packet with UDP
checksum equal to zero.
UDPLFE UDP Lite Frame Enable
When this bit is set, the KSZ8851M will check the checksum at receive side and generate
the checksum at transmit side for UDP Lite frame.
When this bit is cleared, the KSZ8851M will pass the checksum check at receive side and
skip the checksum generation at transmit side for UDP Lite frame.
RXICMPFCC Receive ICMP Frame Checksum Check Enable
When this bit is set, the KSZ8851 will check for correct ICMP checksum for incoming
ICMP frames (only for non-fragment frame). Any received ICMP frames with incorrect
checksum will be discarded.
RXSAF Receive Source Address Filtering
When this bit is set, the KSZ8851M will drop the frame if the source address is same as
MAC address in MARL, MARM, MARH registers.
59
KSZ8851-16/32 MQL/MQLI
M9999-083109-2.0