KSZ8851-32MQLI Micrel Inc, KSZ8851-32MQLI Datasheet - Page 40

• Manufacturer Part Number: KSZ8851-32MQLI
• Description: IC CTLR MAC/PHY NON PCI 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8851-32MQLI

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 576-3630; KSZ8851-32MQLI

In order to read received frames from RXQ without error, the software driver must use following steps:
EEPROM Interface
It is optional in the KSZ8851M to use an external EEPROM. In the case that an EEPROM is not used, the EEEN pin must
be tied Low or floating.
An external serial EEPROM with a standard microwire bus interface is used for non-volatile storage of information such as
the host MAC address and default configuration setting for 8-bit or 16-bit bus width. The KSZ8851M can detect if the
EEPROM is a 1KB (93C46) or 4KB (93C66) EEPROM device (the 93C46 and the 93C66 are typical EEPROM devices).
The EEPROM must be organized as 16-bit mode.
If the EEEN pin is pulled high, then the KSZ8851M performs an automatic read of the external EEPROM words 0H to 6H
after the de-assertion of Reset. The EEPROM values are placed in certain host-accessible registers. EEPROM read/write
functions can also be performed by software read/writes to the EEPCR (0x22) registers.
The KSZ8851M EEPROM format is given in Table 11.
The format for ConfigParam is shown in Table 12.
August 2009
Micrel, Inc.
1. When receive interrupt occurred and software driver writes “1” to clear the RX interrupt in ISR register; the
2. When software driver reads back Receive Frame Count (RXFCTR) Register; the KSZ8851 will update both
3. When software driver reads back both Receive Frame Header Status and Byte Count Registers
Bit
15 - 1
0
KSZ8851 will update Receive Frame Counter (RXFCTR) Register for this interrupt.
Receive Frame Header Status and Byte Count Registers (RXFHSR/RXFHBCR).
(RXFHSR/RXFHBCR); the KSZ8851 will update next receive frame header status and byte count registers
(RXFHSR/RXFHBCR).
WORD
0H
1H
2H
3H
4H – 5H
6H
7H-3FH
Bit Name
Reserved
ASYN_8bit
Description
Reserved
Async 8-bit bus select
1= bus is configured for 16-bit width
0= bus is configured for 8-bit width
This bit is shown in either bit 7 or bit 6 of CCR register
The KSZ8851-32MQL 32-bit device does not care this bit setting
15
Reserved
Host MAC Address Byte 2
Host MAC Address Byte 4
Host MAC Address Byte 6
Reserved
ConfigParam (see Table 12)
Not used for KSZ8851M (available for user to use)
Table 12. ConfigParam Word in EEPROM Format
Table 11. KSZ8851M EEPROM Format
8
40
7
Host MAC Address Byte 1
Host MAC Address Byte 3
Host MAC Address Byte 5
KSZ8851-16/32 MQL/MQLI
0
M9999-083109-2.0