PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 134
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PIC16F88-I/SO
Manufacturer Part Number
PIC16F88-I/SO
Description
18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F88-ISO.pdf
(228 pages)
Specifications of PIC16F88-I/SO
A/d Inputs
7-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
PIC16F88-I/SO
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Quantity:
15 000
Part Number:
PIC16F88-I/SO
Manufacturer:
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20 000
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PIC16F87/88
15.2
The PIC16F87/88 differentiates between various kinds
of Reset:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during Sleep
• WDT Reset during normal operation
• WDT wake-up during Sleep
• Brown-out Reset (BOR)
FIGURE 15-1:
DS30487C-page 132
OSC1
MCLR
V
DD
Reset
31.25 kHz
INTRC
OST/PWRT
Brown-out
V
Module
Detect
DD
WDT
Reset
Rise
OST
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
PWRT
10-bit Ripple Counter
Time-out
Reset
WDT
11-bit Ripple Counter
BOREN
Power-on Reset
External
Reset
Sleep
Some registers are not affected in any Reset condition.
Their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on Power-on Reset (POR), on the MCLR and
WDT Reset, on MCLR Reset during Sleep and Brown-
out Reset (BOR). They are not affected by a WDT
wake-up which is viewed as the resumption of normal
operation. The TO and PD bits are set or cleared
differently in different Reset situations, as indicated in
Table 15-3. These bits are used in software to deter-
mine the nature of the Reset. Upon a POR, BOR or
wake-up from Sleep, the CPU requires approximately
5-10 s to become ready for code execution. This
delay runs in parallel with any other timers. See
Table 15-4 for a full description of Reset states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 15-1.
2005 Microchip Technology Inc.
S
R
Q
Chip_Reset
Enable PWRT
Enable OST
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