PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 44

no-image

PIC16F88-I/SO

Manufacturer Part Number
PIC16F88-I/SO
Description
18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F88-I/SO

A/d Inputs
7-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F88-I/SO
Manufacturer:
ROHM
Quantity:
15 000
Part Number:
PIC16F88-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16F88-I/SO
0
PIC16F87/88
• Clock before switch: One of INTOSC/INTOSC
1.
2.
3.
4.
5.
TABLE 4-3:
DS30487C-page 42
Note 1:
INTRC/Sleep
postscaler (IRCF<2:0>
(31.25 kHz)
(31.25 kHz)
Sleep/POR
IRCF bits are modified to a different INTOSC/
INTOSC postscaler frequency.
edge of the current clock, at which point CLKO
is held low.
The clock switching circuitry then waits for eight
falling edges of requested clock, after which it
switches CLKO to this new clock source.
The IOFS bit is set.
Oscillator switchover is complete.
The clock switching circuitry waits for a falling
INTRC
INTRC
From
Sleep
Clock Switch
The 5-10 s start-up delay is based on a 1 MHz system clock.
LP, XT, HS 32.768 kHz-20 MHz
Postscaler
Postscaler
INTOSC/
INTOSC/
INTOSC
INTOSC
OSCILLATOR DELAY EXAMPLES
T1OSC
EC, RC
EC, RC
INTRC
To
000)
125 kHz-8 MHz
125 kHz-8 MHz
DC – 20 MHz
DC – 20 MHz
Frequency
32.768 kHz
31.25 kHz
4 ms (approx.) and
1024 Clock Cycles
Oscillator Delay
CPU Start-up
CPU Start-up
4 ms (approx.)
(OST)
4.6.6
Table 4-3 shows the different delays invoked for
various clock switching sequences. It also shows the
delays invoked for POR and wake-up.
(1)
(1)
Following a wake-up from Sleep mode or
POR, CPU start-up is invoked to allow the
CPU to become ready for code execution.
Following a change from INTRC, an OST
of 1024 cycles must occur.
Refer to Section 4.6.4 “Modifying the
IRCF Bits” for further details.
OSCILLATOR DELAY UPON
POWER-UP, WAKE-UP AND
CLOCK SWITCHING
 2005 Microchip Technology Inc.
Comments

Related parts for PIC16F88-I/SO