PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 52

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PIC16F88-I/SO

Manufacturer Part Number
PIC16F88-I/SO
Description
18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F88-I/SO

A/d Inputs
7-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F88-I/SO
0
PIC16F87/88
4.7.4
Any interrupt, such as WDT or INT0, will cause the part
to leave the Sleep mode.
The SCS bits are unaffected by a SLEEP command and
are the same before and after entering and leaving
Sleep. The clock source used after an exit from Sleep
is determined by the SCS bits.
4.7.4.1
If SCS<1:0> = 00:
1.
2.
3.
DS30487C-page 50
The device is held in Sleep until the CPU start-up
time-out is complete.
If the primary system clock is configured as an
external oscillator (HS, XT, LP), then the OST will
be active waiting for 1024 clocks of the primary
system clock. While waiting for the OST, the
device will be held in Sleep unless Two-Speed
Start-up is enabled. The OST and CPU start-up
timers run in parallel. Refer to Section 15.12.3
“Two-Speed Clock Start-up Mode” for details
on Two-Speed Start-up.
After both the CPU start-up and OST timers
have timed out, the device will exit Sleep and
begin instruction execution with the primary
clock defined by the FOSC bits.
EXITING SLEEP WITH AN
INTERRUPT
Sequence of Events
If SCS<1:0> = 01 or 10:
1.
2.
Note:
The device is held in Sleep until the CPU start-up
time-out is complete.
After the CPU start-up timer has timed out, the
device will exit Sleep and begin instruction
execution with the selected oscillator mode.
If a user changes SCS<1:0> just before
entering Sleep mode, the system clock
used when exiting Sleep mode could be
different than the system clock used when
entering Sleep mode.
As an example, if SCS<1:0> = 01 and
T1OSC is the system clock and the
following instructions are executed:
BCF
SLEEP
then a clock change event is executed. If
the primary oscillator is XT, LP or HS, the
core will continue to run off T1OSC and
execute the SLEEP command.
When Sleep is exited, the part will resume
operation with the primary oscillator after
the OST has expired.
 2005 Microchip Technology Inc.
OSCCON, SCS0

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