PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 35

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PIC16F88-I/SO

Manufacturer Part Number
PIC16F88-I/SO
Description
18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F88-I/SO

A/d Inputs
7-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
An example of the complete four-word write sequence
is shown in Example 3-5. The initial address is loaded
into the EEADRH:EEADR register pair; the four words
of data are loaded using indirect addressing, assuming
that a row erase sequence has already been
performed.
EXAMPLE 3-5:
 2005 Microchip Technology Inc.
; This write routine assumes the following:
; 1. The 32 words in the erase block have already been erased.
; 2. A valid starting address (the least significant bits = '00') is loaded into EEADRH:EEADR
; 3. This example is starting at 0x100, this is an application dependent setting.
; 4. The 8 bytes (4 words) of data are loaded, starting at an address in RAM called ARRAY.
; 5. This is an example only, location of data to program is application dependent.
; 6. word_block is located in data memory.
LOOP
BANKSEL
BSF
BSF
BCF
BANKSEL
MOVLW
MOVWF
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWF
BANKSEL
MOVLW
MOVWF
BANKSEL
MOVF
MOVWF
INCF
MOVF
MOVWF
INCF
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BANKSEL
INCF
BANKSEL
DECFSZ
GOTO
BANKSEL
BCF
BSF
EECON1
EECON1, EEPGD
EECON1, WREN
EECON1, FREE
word_block
.4
word_block
EEADRH
0x01
EEADRH
0x00
EEADR
ARRAY
ARRAY
FSR
EEDATA
INDF, W
EEDATA
FSR, F
INDF, W
EEDATH
FSR, F
EECON1
0x55
EECON2
0xAA
EECON2
EECON1, WR
EEADR
EEADR, f
word_block
word_block, f
loop
EECON1
EECON1, WREN
INTCON,GIE
WRITING TO FLASH PROGRAM MEMORY
;prepare for WRITE procedure
;point to program memory
;allow write cycles
;perform write only
;prepare for 4 words to be written
;Start writing at 0x100
;load HIGH address
;load LOW address
;initialize FSR to start of data
;indirectly load EEDATA
;increment data pointer
;indirectly load EEDATH
;increment data pointer
;required sequence
;set WR bit to begin write
;instructions here are ignored as processor
;load next word address
;have 4 words been written?
;NO, continue with writing
;YES, 4 words complete, disable writes
;enable interrupts
PIC16F87/88
DS30487C-page 33

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