DS80C400 Maxim, DS80C400 Datasheet - Page 53

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DS80C400

Manufacturer Part Number
DS80C400
Description
The DS80C400 network microcontroller offers the highest integration available in an 8051 device
Manufacturer
Maxim
Datasheet

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DS80C400 Network Microcontroller
IF, Inverse Filtering
0 = inverse filtering disabled (default)
1 = inverse filtering by the address check block enabled
PB, Pass Bad Frames
0 = packet filter bit in the receive status word is set (= 1) only when error-free frames received (default)
1 = packet filter bit in the receive status word is set (= 1) for frames that pass the destination address filter even
when they contain errors. Promiscuous mode should always be used when this bit is set.
HO, Hash-Only Filtering Mode
This bit should only be set when HP = 1.
0 = filter unicast frames according to filter mode configuration (default)
1 = hash filtering of unicast and multicast frames by the address check block
HP, Hash/Perfect Filtering Mode
0 = perfect filtering by the address check block for unicast and multicast frames (default)
1 = hash filtering by the address check block for multicast frames and perfect filtering of unicast frames
LCC, Late Collision Control
0 = transmission is aborted if a late collision is encountered (default)
1 = allows frame retransmission attempts even when a late collision is encountered
DBF, Disable Broadcast Frames
0 = packet filter bit in the receive status word is set (= 1) for each broadcast frame received (default)
1 = packet filter bit in the receive status word is reset (= 0) for each broadcast frame received
DRTY, Disable Retry
0 = MAC attempts to transmit a frame 16 times before signaling a retry error (default)
1 = MAC attempts to transmit a frame only once before signaling a retry error
ASTP, Automatic Pad Stripping
0 = receive frames are transferred to the BCU without modification (default)
1 = zero padding and CRC are stripped for receive frames, which specify a data length less than 46 Bytes
BOLMT[1:0], Back-Off Limit. The back-off protocol requires that the MAC wait some number of time slots (512bits
/ time slot) before rescheduling a transmission attempt. A 10-bit free-running counter is used to generate this back-
off delay. The BOLMT[1:0] bits select the number of bits to be used from the 10-bit counter.
00 = 10 bits (0 to 1024 time slots, default)
01 = 8 bits (0 to 256 time slots)
10 = 4 bits (0 to 16 time slots)
11 = 1 bit (none or 1 time slot)
DC, Deferral Check
0 = MAC can defer indefinitely while waiting to transmit (default)
1 = MAC aborts a transmission attempt if it has deferred for more than 24,288 consecutive bit times
TE, Transmitter Enable
0 = transmitter disabled (default)
1 = transmitter enabled
RE, Receiver Enable
0 = receiver disabled (default)
1 = receiver enabled
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