DS80C400 Maxim, DS80C400 Datasheet - Page 65

no-image

DS80C400

Manufacturer Part Number
DS80C400
Description
The DS80C400 network microcontroller offers the highest integration available in an 8051 device
Manufacturer
Maxim
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS80C400
Manufacturer:
DALLAS
Quantity:
748
Part Number:
DS80C400-FNY
Manufacturer:
DALLAS
Quantity:
85
Part Number:
DS80C400-FNY
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS80C400-FNY+
Manufacturer:
TDK-Lambda
Quantity:
34
Part Number:
DS80C400-FNY+
Manufacturer:
Maxim
Quantity:
3 861
Part Number:
DS80C400-FNY+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS80C400-FNY+
Manufacturer:
MAXI/DALLAS
Quantity:
20 000
Transmit/Receive Status Words
For each attempt made by the MAC to receive or transmit packet data, the BCU writes a 32-bit transmit or receive
status word back to the first word of the starting page for the packet. This word provides status information needed
by the CPU to determine when and what action should be taken.
Transmit Status Word
Bit Names:
RETRY, Packet Retry. This bit indicates that the current transmit packet has to be retried because of a collision on
the bus. The application has to restart the transmission of the frame when this bit is set to 1. When this bit is reset,
it indicates that the transmission of the current frame is completed. The success or failure to transmit a frame is
indicated by the framed aborted (ABORT) bit.
HBF, Heart-Beat Fail. This bit is only meaningful for ENDEC mode. This bit is not valid if the NODAT or XFDR bit
is set.
0 = heart-beat collision check successful
1 = heart-beat collision check failed
COL_CNT [3:0], Collision Count. These four bits indicate the number of collisions that occurred before the frame
was transmitted. Collision count is valid only in half-duplex mode and it is not valid when the excessive collisions
(XCOL) bit is set.
OLTCOL, Late Collision Observed. This bit is only valid in half-duplex mode and is always set if the late collision
abort (LTCOL) bit is set in the status word.
0 = no late collisions observed
1 = late collision (collision after the first time slot) observed.
DFR, Deferred. This bit is only valid in half-duplex mode.
0 = no deferral required for the frame transmission attempt
1 = MAC had to defer while waiting to transmit because the carrier was not idle
NODAT, Underrun
0 = transmit frame was not aborted due to data underrun
1 = transmit frame aborted because the MAC did not have sufficient data to complete the current frame
transmission
XCOL, Excessive Collisions. This bit is only valid in half-duplex mode.
0 = transmit frame was not aborted due to excessive collisions
1 = transmit frame aborted because of excessive collisions (16 transmit attempts unless DRTY = 1)
LTCOL, Late Collision. This bit is only valid in half-duplex mode.
0 = transmit frame was not aborted due to a late collision
1 = transmit frame aborted due to collision occurring after the collision window of 64 Bytes. This bit is not valid if the
NODAT bit is set.
XDFR, Excessive Deferral. This bit is only valid in half-duplex mode when the MAC control register bit DFR is set.
0 = transmit frame was not aborted due to excessive deferral
1 = transmit frame aborted due to deferral of over 24,288 bit times
LSCRS, Loss of Carrier. This bit is only valid in half-duplex mode.
0 = transmit frame was not aborted due to loss of carrier
1 = transmit frame aborted due to loss of carrier (CRS = 0 during the frame transmission)
31
23
15
7
NODAT
RETRY
XCOL
HBF
LTCOL
XDFR
COL_CNT [3:0]
65 of 97
LSCRS
NOCRS
OLTCOL
JABTO
ABORT
DFR
24
16
8
0

Related parts for DS80C400