DS80C400 Maxim, DS80C400 Datasheet - Page 67

• Manufacturer Part Number: DS80C400
• Description: The DS80C400 network microcontroller offers the highest integration available in an 8051 device
• Manufacturer: Maxim

VLAN2, Two_Level VLAN Frame
0 = receive frame did not contain a VLAN tag that matched the VLAN2 register
1 = receive frame 13th and 14th bytes matched the two-level VLAN tag register (VLAN2)
VLAN1, One_Level VLAN Frame
0 = receive frame did not contain a VLAN tag that matched the VLAN1 register
1 = receive frame 13th and 14th bytes matched the one-level VLAN tag register (VLAN1)
CRC, CRC Error. This bit is also set to 1 if the RX_ER pin is asserted by the PHY during a reception, even if the
CRC-32 for the frame is correct.
DRIB, Dribbling Bit. This bit is not valid if the COL or RUNT bits are set to 1. If DRIB = 1 and CRC = 0, then the
packet is valid.
0 = receive frame did not contain any dribbling bits
1 = receive frame contained dribbling bits (a noninteger multiple of 8 bits)
MII_ER, MII Error
0 = PHY did not assert the RX_ER signal during reception of the frame
1 = PHY asserted the RX_ER signal (indicating an error was detected) during the receive frame
TYPE, Frame Type. This bit is not valid for runt frames less than 14 Bytes.
0 = length specified in the length/type field (i.e., value equal or less than 1500)
1 = type specified in the length/type field (i.e., value greater than 1500)
COL, Collision Seen
0 = receive frame did not incur any collisions
1 = receive frame is damaged by a late collision (one that occurred after the first 64 bytes)
LONG, Frame Too Long. This bit only serves as a status indicator and does not cause frame truncation.
0 = receive frame did not exceed the maximum frame length check
RUNT, Runt Frame
0 = receive frame is not a runt frame (<64 Bytes)
1 = receive frame does not meet the minimum required frame size (64 Bytes = 1 time slot) due to a collision or
premature frame termination
WDOG, Watchdog Timeout. The FLEN[13:0] field is not valid when this bit is set.
0 = MAC watchdog timer did not timeout during the receive frame
1 = MAC watchdog timer timed out during the receive frame. The watchdog timer is programmed to twice the
maximum frame length (3036 bit times).
FLEN [13:0], Frame Length [13:0]. This field indicates the receive frame length in bytes, including zero padding
pad (if applicable) and the CRC-32 field, unless automatic pad stripping has been enabled (ASTP = 1). When
ASTP = 1, the frame length includes only the data field.
0 = CRC-32 error was not detected for the receive frame
1 = CRC-32 error was detected for the receive frame
1 = receive frame exceeded the maximum frame length (1518 Bytes, unless VLAN tagged)
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