DS80C400 Maxim, DS80C400 Datasheet - Page 81

• Manufacturer Part Number: DS80C400
• Description: The DS80C400 network microcontroller offers the highest integration available in an 8051 device
• Manufacturer: Maxim

DS80C400 Network Microcontroller
CAN Interrupts
The DS80C400 provides one interrupt source for the CAN controller. The CAN interrupt source can be triggered by
a receive/transmit acknowledgment from one of the 15 message centers or an error condition.
Each message center has individual ETI (transmit) and ERI (receive) interrupt enable bits and INTRQ flag bits that
are found in the corresponding message control (C0MxC) SFR. If the ETI or ERI bits have been set for a message
center, the successful transmission or receipt of a message, respectively, sets the INTRQ bit for that message
center. The INTRQ bit can only be cleared through software. All message center interrupt flags (INTRQ) of the
CAN module are ORed together to produce a single interrupt source for the CAN controller. For the microcontroller
to acknowledge any individual message center interrupt request, the global interrupt enable bit (IE.7) and the CAN
0 interrupt enable bit, EIE.6, must both be set.
Interrupt assertion of error and status conditions associated with the CAN module is controlled by the ERIE and
STIE bits located in the CAN 0 control (C0C) SFR. These interrupt sources also require that the global interrupt
enable (EA = IE.7) and the CAN 0 interrupt enable (C0IE = EIE.6) bits be set in order to be acknowledged by the
microcontroller.
Arbitration and Masking
After the CAN module has ascertained that an incoming message is bit error-free, the identification field of that
message is then compared against one or more arbitration values to determine if they are loaded into a message
center. Each enabled message center (see the MSRDY bit in the CAN message control register) is tested in order
from 1 to 15. The first message center to successfully pass the test receives the incoming message and ends the
testing. The use of masking registers allows the use of more complex identification schemes, as tests can be made
based on bit patterns rather than an exact match between all bits in the identification field and arbitration values.
The CAN controller also incorporates a set of five masks to allow messages with different IDs to be grouped and
successfully loaded into a message center; note that some of these masks are optional as per the bits shown in
Table
21.
There are several possible arbitration tests, varying according to which message center is involved. If all of the
enabled tests succeed, the message is loaded into the respective message center. The most basic test, performed
on all messages, compares either 11 (CAN 2.0A) or 29 (CAN 2.0B) bits of the identification field to the appropriate
arbitration register, based on the EX/ST bit in the CAN 0 format register. The MEME bit (C0MxF.1) controls whether
the arbitration and ID registers are compared directly or through a mask register. A special set of arbitration
registers dedicated to message center 15 allows added flexibility in filtering this location.
If desired, further arbitration can be performed by comparing the first two bytes of the data field in each message
against two 8-bit media arbitration register bytes. The MDME bit in the CAN message center format registers
(C0MxF.0) either disables (MDME = 0) arbitration, or enables (MDME = 1) arbitration using the media ID mask
registers 0–1.
If the 11-bit or 29-bit arbitration and the optional media-byte arbitration are successful, the message is loaded into
the respective message center. The format register also allows the microcontroller to program each message
center to function in a receive or transmit mode through the T/R bit and to use from 0 to 8 data bytes within the data
field of a message. Note that message center 15 can only be used in a receive mode. To avoid a priority inversion,
the DS80C400 CAN controller is configured to reload the transmit buffer with the message of the highest priority
(lowest message center number) whenever an arbitration is lost or an error condition occurs.
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