TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 104

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

7.4
Register Settings
RB000
7.4
7.4.1
7.4.2
Register Settings
following setting:
setting:
Setting procedure when the operation mode is set to generate INTVLTD interrupt
Setting procedure when the operation mode is set to generate voltage detection
request signals
reset signals
Note 1: VDCR1 and VDCR2 are initialized by a power-on reset or an external reset input only. If the supply voltage
Note 2: The voltage detection reset signals are generated continuously as long as the supply voltage (VDD) is lower
When the operation mode is set to generate INTVLTD interrupt request signal, make the following setting:
To disable the voltage detection circuit while it is enabled with the INTVLTD interrupt request, make the
When the operation mode is set to generate voltage detection reset signals, make the following setting:
To disable the voltage detection circuit while it is enabled with the voltage detection reset, make the following
Note:When the supply voltage (VDD) is close to the detection voltage (VDxLVL), voltage detection request
Note:If the voltage detection circuit is disabled without clearing interrupt enable flag, unexpected interrupt
1. Clear the voltage detection circuit interrupt enable flag to "0".
2. Set the detection voltage at VDCR1<VDxLVL>(x=1 to 2).
3. Clear VDCR2<VDxMOD> to "0" to set the operation mode to generate INTVLTD interrupt request
4. Set VDCR2<VDxEN> to "1" to enable the voltage detection operation.
5. Wait for 5 [μs] or more until the voltage detection circuit becomes stable.
6. Make sure that VDCR1<VDxSF> is "0".
7. Clear the voltage detection circuit interrupt latch to "0" and set the interrupt enable flag to "1" to enable
1. Clear the voltage detection circuit interrupt enable flag to "0".
2. Clear VDCR2<VDxEN> to "0" to disable the voltage detection operation.
1. Clear the voltage detection circuit interrupt enable flag to "0".
2. Set the detection voltage at VDCR1<VDxLVL>(x=1 to 2).
3. Clear VDCR2<VDxMOD> to "0" to set the operation mode to generate INTVLTD interrupt request
4. Set VDCR2<VDxEN> to "1" to enable the voltage detection operation.
5. Wait for 5 [μs] or more until the voltage detection circuit becomes stable.
6. Make sure that VDCR1<VDxSF> is "0".
7. Clear VDCR1<VDxF> to "0".
8. Set VDCR2<VDxMOD> to "1" to set the operation mode to generate voltage detection reset signals.
1. Clear the voltage detection circuit interrupt enable flag to "0".
signals.
interrupts.
signals may be generated frequently. If this may pose any problem, execute appropriate wait processing
depending on fluctuations in the system power supply and clear the interrupt latch before returning from
the INTVLTD interrupt service routine.
request may occur.
signals.
(VDD) becomes lower than the detection voltage (VDxLVL) in the period from release of the voltage detection
reset until clearing of VDCR2<VDxEN> to "0", a voltage detection reset signal is generated immediately.
than the detection voltage (VDxLVL).
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TMP89FS60