TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 185

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RB002
13.5
13.5.1
The digital noise canceller can be used in the operation modes that use the TCA0 pin.
Noise Canceller
TA0CR<TA0NC>. When the same level is detected three times consecutively, the level of the input to the timer
is changed.
the TA0CR<TA0S> value.
sampling interval after TA0CR<TA0NC> is set has elapsed. This stabilizes the input signal.
writing is ignored.
operation. Setting TA0CR<TA0NC> to "00" disables the noise canceller. Setting TA0CR<TA0NC> to "01" or
"10" disables the TCA0 pin input.
When the digital noise canceller is used, the input level is sampled at the sampling intervals set at
Setting TA0CR<TA0NC> to any values than "00" allows the noise canceller to start operation, regardless of
When the noise canceller is used, allow the timer to start after a period of time that is equal to four times the
Set TA0CR<TA0NC> while the timer is stopped (TA0CR<TA0S> = "0"). When TA0CR<TA0S> is "1",
In the SLOW 1/2 or SLEEP 1 mode, setting TA0CR<TA0NC> to "11" selects fs/2 as the source clock for the
Setting
Table 13-4 Noise Cancel Time ( fcgck = 8 [MHz] )
TA0NC
00
01
10
11
Sampling interval
32 μs (256/fcgck)
250 ns (2/fcgck)
500 ns (4/fcgck)
None
Page 169
Time removed as noise
750 ns or less
1.5 μs or less
96 μs or less
-
Time regarded as signal
128 μs or more
1 μs or more
2 μs or more
-
TMP89FS60

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