TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 218

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

14.4
Functions
RA005
level as the initial state of the PWM1 pin. Setting T01MOD<TFF1> to "1" selects the "H" level as the initial
state of the PWM1 pin. If the PWM1 pin is set as the function output pin in the port setting while the timer
is stopped, the value of T01MOD<TFF1> is output to the PWM1 pin. Table 14-11 shows the list of output
levels of the PWM1 pin.
Set the initial state of the PWM1 pin at T01MOD<TFF1>. Setting T01MOD<TFF1> to "0" selects the "L"
Table 14-11 List of Output Levels of PWM1 Pin
TFF1
0
1
Table 14-10 Cycles in Which Additional Pulses Are Inserted
PWMAD0="1"
PWMAD1="1"
PWMAD2="1"
PWMAD3="1"
Before the start of
(initial state)
operation
H
L
9
5, 13
3, 7, 11, 15
2, 4, 6, 8, 10, 12, 14, 16
Cycles in which additional pulses are inserted among
(after the addition-
Page 202
PWMDUTY
matched
al pulse)
PWM1pin output level
H
L
cycles 1 to 16
Overflow
H
L
Operation stop-
(initial state)
ped
H
L
TMP89FS60