TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 42

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

2.3
System clock controller
RB000
Note 1: The NORMAL1 and NORMAL2 modes are generically called the NORMAL mode; the SLOW1 and SLOW2 modes
Note 2: The mode is released by the falling edge of the source clock selected at TBTCR<TBTCK>.
2.3.5.4
are called the SLOW mode; the IDLE0, IDLE1 and IDLE2 modes are called the IDLE mode; and the SLEEP0 and
SLEEP1 are called the SLEEP mode.
(a) Single-clock mode
(b) Dual-clock mode
Transition of operation modes
SLEEP1
mode
mode
IDLE0
mode
IDLE2
Figure 2-7 Operation Mode Transition Diagram
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
Interrupt
Interrupt
Interrupt
SYSCR2<TGHALT> = ”1”
SYSCR2<SYSCK> = "0"
SYSCR2<XTEN> = "0"
SYSCR2<XEN> = "1"
(Note 2)
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NORMAL1
NORMAL2
SLEEP0
SLOW2
SLOW1
mode
mode
mode
mode
mode
IDLE0
mode
(Note 2)
SYSCR2<TGHALT> = "1"
SYSCR2<SYSCK> = "1"
SYSCR2<XEN> = "0"
SYSCR2<XTEN> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
Warm-up completed
STOP mode release
STOP mode release
STOP mode release
Warm-up that
follows reset
release
signal
signal
signal
Reset release
STOP
RESET
TMP89FS60