AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 15
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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Rev. 1138F–FPSLI–06/02
The FPGA clocks from the AVR are effected differently in the various sleep modes of the AVR,
see Table 2.
The source clock into the FPGA GCK5 and GCK6 will determine what happens during the var-
ious power-down modes of the AVR.
If the XTAL clock input is used as an FPGA clock (GCK5 or GCK6) in Idle mode, it will still be
running. In Power-down/save mode the XTAL clock input will be off.
If the TOSC clock input is used as an FPGA clock (GCK6) in Idle mode, it will still be running in
Power-save mode but will be off in Power-down mode.
If the Watchdog Timer is used as an FPGA clock (GCK6) and was enabled in the AVR, it will
be running in all sleep modes.
Table 2. Clock Activity in Various Modes
Mode
Idle
Power-save
Power-down
Clock Source
XTAL
TOSC
WDT
XTAL
TOSC
WDT
XTAL
TOSC
WDT
GCK5
Active
Not Available
Not Available
Inactive
Not Available
Not Available
Inactive
Not Available
Not Available
AT94K Series FPSLIC
GCK6
Active
Active
Active
Inactive
Active
Active
Inactive
Inactive
Active
15
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