AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 6
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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The Busing
Network
6
AT94K Series FPSLIC
Figure 3. Busing Network
Figure 4 depicts one of five identical FPGA busing planes. Each plane has three bus
resources: a local-bus resource (the middle bus) and two express-bus resources. Bus
resources are connected via repeaters. Each repeater has connections to two adjacent local-
bus segments and two express-bus segments. Each local-bus segment spans four cells and
connects to consecutive repeaters. Each express-bus segment spans eight cells and
bypasses a repeater. Repeaters regenerate signals and can connect any bus to any other bus
(all pathways are legal) on the same plane. Although not shown, a local bus can bypass a
repeater via a programmable pass gate, allowing long on-chip tri-state buses to be created.
Lo ca l/loc al tu r ns ar e im ple me nte d th ro ug h p as s g a tes in the c ell-b us int er fac e.
Express/express turns are implemented through separate pass gates distributed throughout
the array.
= I/O Pad
= AT40K Cell
= Repeater Row
= Repeater
= RAM Block
Interface to AVR
Rev. 1138F–FPSLI–06/02
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