AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 62
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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Power-on Reset
62
AT94K Series FPSLIC
Table 15. Reset Characteristics (V
Note:
A Power-on Reset (POR) circuit ensures that the device is reset from power-on. As shown in
Figure 35, an internal timer clocked from the Watchdog Timer oscillator prevents the MCU
from starting until after a certain period after V
– V
Figure 36. MCU Start-up, RESET Tied to V
Figure 37. Watchdog Reset during Operation
Symbol
V
V
T
POT(1)
RST
TOUT
POT
RESET TIME-OUT
INTERNAL RESET
INTERNAL RESET
WDT TIME-OUT
, regardless of the V
RESET (HIGH)
1. The Power-on Reset will not work unless the supply voltage has been below V
V
TIME-OUT
CC
Parameter
Power-on Reset Threshold
(Rising)
Power-on Reset Threshold
(Falling)
RESET Pin Threshold
Voltage
Reset Delay Time-out Period
RESET
(HIGH)
V
CC
CC
rise time (see Figure 36 and Figure 37).
CC
V
V
= 3.3V)
POT
RST
1 XTAL CYCLE
t
t
TOUT
TOUT
CC
Minimum
CC
12.8
1.0
0.4
0.4
3.2
has reached the Power-on Threshold voltage
Typical
V
16.0
1.4
0.6
0.5
4.0
CC
5
/2
Maximum
19.2
1.8
0.8
0.6
4.8
Rev. 1138F–FPSLI–06/02
POT
(falling).
cycles
Units
CPU
ms
V
V
V
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