m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 178
m28529-12
Manufacturer Part Number
m28529-12
Description
Inverse Multiplexing For Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529-12.pdf
(309 pages)
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2.2.22
The RXHDR2 register contains the second byte of the Receive Cell Header. (See 0x18—RXHDR1.)
2.2.23
The RXHDR3 register contains the third byte of the Receive Cell Header. (See 0x18—RXHDR1.)
28529-DSH-001-K
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x19—RXHDR2 (Receive Cell Header Control Register 2)
0x1A—RXHDR3 (Receive Cell Header Control Register 3)
RxHdr2[7]
RxHdr2[6]
RxHdr2[5]
RxHdr2[4]
RxHdr2[3]
RxHdr2[2]
RxHdr2[1]
RxHdr2[0]
RxHdr3[7]
RxHdr3[6]
RxHdr3[5]
RxHdr3[4]
RxHdr3[3]
RxHdr3[2]
RxHdr3[1]
RxHdr3[0]
Name
Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
These bits hold the Receive Header values for Octet 2 of the incoming cell.
These bits hold the Receive Header values for Octet 3 of the incoming cell.
®
Description
Description
Registers
163
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