m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 234

• Manufacturer Part Number: m28529-12
• Description: Inverse Multiplexing For Atm Ima Family
• Manufacturer: Mindspeed Technologies

2.5.20
This register contains the most significant bits of a 16 bit count of the number of ATM layer cells received over the
Receive ATM side UTOPIA bus for a particular UTOPIA address. The register is read only.
Rx UTOPIA Address 0 - 15
Rx UTOPIA Address 16–31
28529-DSH-001-K
0xC49
0x851
n=16
n=0
Bit
7-0
0x853
n=17
0xC4
n=1
B
Default
0
0x855
n=18
0xC4
n=2
D
IMA_RX_ATMn_CELL_COUNT_MSB (Receive Cell Count MSBs)
Receive Cell Count MSBs
0x857
0xC4F
n=19
n=3
0x951
n=20
0xCC
Name
n=4
9
0x953
Mindspeed Proprietary and Confidential
n=21
0xCC
Mindspeed Technologies
n=5
B
0x955
n=22
0xCC
n=6
D
Receive Cell Count: This field contains the most significant bits of a 16 bit count of the
number of ATM layer cells received over the specific UTOPIA address. A write operation
with data = 0x01 to the first address (0x850 for Address 0, 0x852 for Address 1, etc.)
transfers the state of all 16 bits of the counter to registers that are accessible to the
microprocessor bus and clears the counter. A read operation should then be performed to
read the previous state of the counter. The first address should be read first. The second
address (0x851 for Address 0, 0x853 for Address 1, etc.) is read next. A write operation
with data = 0x00 to the first address of each group returns back to the raw counters.
M28525 -- Not Applicable
0xCCF
0x957
n=23
n=7
M28525
M28529
M28529
0xA51
n=24
0xD4
n=8
9
0xA53
n=25
0xD4
n=9
®
B
0xA55
n=26
n=10
0xD4
D
Description
0xD4F
0xA57
n=27
n=11
0xB51
n=28
n=12
0xDC
9
0xB53
n=29
n=13
0xDC
B
0xB55
n=14
n=30
0xDC
Registers
D
0xB57
n=15
n=31
0xDC
F
219