m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 99
m28529-12
Manufacturer Part Number
m28529-12
Description
Inverse Multiplexing For Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529-12.pdf
(309 pages)
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Figure 1-23. DSL—UTOPIA-to-UTOPIA
1.13
The M2852x supports multi-PHY operation as described in the UTOPIA Level specification (AF-PHY-0039.000, see
www.atmforum.com). This standard allows up to 31 ports to be interfaced to both the ATM and PHY side interfaces.
The interfaces use either 8-bit or 16-bit wide data buses, and cell-level handshaking.
Each of the M2852x's UTOPIA blocks have two sections, transmit and receive. For the ATM interface, on the
transmit side, ATM cell data is placed in the transmit FIFOs where it can then be passed to the ATM cell processing
block. On the receive side of the UTOPIA interface, incoming cells are placed in the receive FIFO until sent. Both
FIFOs on the ATM side are 4 cells deep.
28529-DSH-001-K
24 x line rate
IMA_RefClk
IMA_SysClk
SPRxClk 0
General Notes:
TxClav Transition
1. SPRxCLK 1-31 are identical but not shown for clarity
2. NCO - Numerically controlled oscillator; controlled by parameters in Register 816 and 817.
2. RM - Rate Multiplier.
UTOPIA Interfaces
Transition
Detector
Transition
Detector
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Pre-Scaler
/16
/24
RM
RM
1
1
RM
1
Synchronizer
ref
Synchronizer
ref
n*8kHz
NCO
Synchronizer
ref
®
RM
1
up/down adjust
n*8kHz
n*8kHz
Note 2
Note 2
NCO
NCO
RM
424
Functional Description
Comparator
Phase
84
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