m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 59

• Manufacturer Part Number: m28529-12
• Description: Inverse Multiplexing For Atm Ima Family
• Manufacturer: Mindspeed Technologies

Table 1-11.
28529-DSH-001-K
MemAddr[0]
MemAddr[1]
MemAddr[2]
MemAddr[3]
MemAddr[4]
MemAddr[5]
MemAddr[6]
MemAddr[7]
MemAddr[8]
MemAddr[9]
MemAddr[10]
MemAddr[11]
MemAddr[12]
MemAddr[13]
MemAddr[14]
MemAddr[15]
MemAddr[16]
MemAddr[17]
MemAddr[18]
MemAddr[19]
MemCtrl_CE*
MemCtrl_OE*
MemCtrl_WE*
MemCtrl_CLK
MemCtrl_ADSC*
TRST*
TCK
TMS
TDI
TDO
Pin Label
M2852x Pin Descriptions (4 of 18)
Differential Delay
Memory Address Bus
Chip Enable
Output Enable
Write Enable
SRAM Clock
Address Enable
Test Reset
Test Clock
Test Mode Select
Test Data Input
Test Data Output
Signal Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
AA26
AA25
AB26
AA24
AB25
W26
W25
W24
W23
M25
M24
No.
U25
T23
V26
U24
V25
U23
V24
Y26
V23
Y25
Y24
Y23
N23
L26
C5
A2
D5
C4
C3
I/PU
I/PU
I/PU
I/PU
I/O
O
O
O
O
O
O
O
Receive SRAM Address Bus.
When asserted, the internal boundary-scan logic is reset. This pin
Samples the value of TMS and TDI on its rising edge to control the
Controls the boundary-scan Test Access Port (TAP) controller
The serial test data input. This pin has a pull-up resistor.
These signals are enabled by tying the ExtMemSel pin high.
Receive SRAM Device Select (active low) control signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM Device Output (active low) control signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM write enable (active low) control signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM clock signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM address enable (active low) address strobe.
This signal is enabled by pulling the ExtMemSel pin high.
has a pull-up resistor.
boundary scan operations.
operation. This pin has a pull-up resistor.
The serial test data output.
®
Description
Functional Description
44