m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 296

• Manufacturer Part Number: m28529-12
• Description: Inverse Multiplexing For Atm Ima Family
• Manufacturer: Mindspeed Technologies

Table 4-3.
Table 4-4.
28529-DSH-001-K
Comments:
CIT.10
CIT.11
CIT.12
CIT.13
CIT.14
CIT.15
CIT.16
IDC.1
IDC.2
IDC.3
IDC.4
IDC.5
Item
Item
CIT.8
CIT.9
Does the implementation ensure on transmit that a Filler cell is not injected if
an ATM layer cell is available for scheduling?
Does the implementation only check on transmit that an ATM layer cell is
available and accept that cell only when the Tx IDCC ticks?
Does the implementation only select the TRL from the set of links whose
transmit state is Active?
If there is no link in the Active state, does the implementation select one of
the links in the Usable state, if any, or one of the links in the Unusable state
otherwise?
Does the implementation only select or change the TRL during the following
situations:
during group start-up,
when the previously selected TRL's transmit state changes from Active to
any other state (e.g., Usable, Unusable, or Not In Group) while another link’s
transmit state is Active, or
when the previously selected TRL’s transmit state changes from Usable to
Unusable or Not In Group while another link’s transmit state is Active or
Usable?
Does the implementation perform stuffing by repeating the ICP cell
containing the LSI code indicating that “this cell is 1 out of 2 ICP cells
comprising the stuff event”?
Does the implementation also indicate an incoming stuff event in the fourth,
third, and second ICP preceding the stuff event using the optional LSI
codes?
At any given link, does the implementation ensure it does not introduce a
stuff event more than once every 5*M ICP, Filler and ATM layer cells?
Does the implementation remove one of any two consecutive ICP cells with
LSI code indicating “this cell is 1 out of the 2 ICP cells comprising the stuff
event”?
Does the implementation ensure that the SICP cell is not counted as a cell
for the purposes of determining the IMA round-robin sequence?
Does the implementation support CTC and ITC modes on receive?
Does the implementation inform the UM of a mismatch between the FE and
NE IMA transmit clock modes?
Does the implementation ensure that a restart is not caused if the
implementation detects a mismatch between the FE and NE Transmit clock
modes?
Does the implementation rely on at least one ICP cell with a correct CRC-10
in order to process the incoming stuff cell indication code (this is
recommended)?
CTC and ITC Operation Functions (2 of 2)
IMA Data Cell (IDC) Rate Implementation Functions (1 of 2)
Protocol feature
Protocol feature
Mindspeed Proprietary and Confidential
Mindspeed Technologies
®
Cond. for
Cond. for
Status
Status
Status
Status
Pred.
Pred.
M
M
M
M
M
M
M
O
O
M
M
M
M
M
(R-59)
(O-11)
(R-60)
(R-61)
(R-61)
(R-62)
(R-63)
(R-63)
(O-12)
(R-64)
(R-64)
(R-65)
(R-66)
(R-67)
Ref.
Ref.
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Appendices
Support
Support
281