m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 39

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m28529-12

Manufacturer Part Number
m28529-12
Description
Inverse Multiplexing For Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet

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Table 1-9.
28529-DSH-001-K
TRST*
TCK
TMS
TDI
TDO
TestEnable[0]
TestEnable[1]
ScanEnable
Tristate
PhyIntFcSel
IMA_SysClk
IMA_RefClk
TxTRL[0]
TxTRL[1]
Pin Label
M28529 Pin Descriptions (5 of 19)
Test Reset
Test Clock
Test Mode Select
Test Data Input
Test Data Output
Tristate
PHY Interface Select
IMA Subsystem Clock
IMA Subsystem Clock
Transmit Reference Clock
Signal Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
AC22
AD23
AD24
AF26
AE25
No.
A19
B19
E18
E16
D5
C5
A2
C4
C3
I /PD
I/PU
I/PU
I/PU
I/PU
I/PD
I/PD
I/PU
I/PU
I/PU
I/O
O
O
When asserted, the internal boundary-scan logic is reset. This pin
has a pull-up resistor.
Samples the value of TMS and TDI on its rising edge to control the
boundary scan operations.
Controls the boundary-scan Test Access Port (TAP) controller
operation. This pin has a pull-up resistor.
The serial test data input. This pin has a pull-up resistor.
The serial test data output.
Factory test use only, tie to VSS.
Factory test use only, tie to VSS.
When this pin is high, all outputs are tristate.
If this pin is tied low, the PHY UTOPIA Interface mode is selected.
If this pin is tied high, the PHY Serial mode is selected (as shown
in this table).
Most of the IMA logic circuits use this clock (or a derivative of it).
It can also be used as a T1/E1 reference clock. Refer to
Section
If Ref_Xclk is to be used as a reference clock, set the frequency as
shown in
Transmit Reference Clocks.
®
1.12.
Section
1.12.
Description
Functional Description
24

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