h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 1017

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bit 3—Output Port Enable (OPE): This bit specifies whether the output of the address bus and
bus control signals (
software standby mode.
Bits 2 to 0—Reserved: These bits always return 0 when read, and cannot be written to.
23A.2.2 System Clock Control Register (SCKCR)
SCKCR is an 8-bit readable/writable register that performs clock output control and medium-
speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 6
STS2
0
1
Bit 3
OPE
0
1
Section 23A Power-Down Modes [HD64F2636F, HD64F2638F, HD6432636F, HD6432638F,
Bit 5
STS1
0
1
0
1
Description
In software standby mode, address bus and bus control signals are high-impedance.
In software standby mode, the output state of the address bus and bus control signals
is retained.
Bit 4
STS0
0
1
0
1
0
1
0
1
A S
,
R D
HD64F2630F, HD6432630F, HD64F2635F, HD6432635F, HD6432634F]
,
H W R
Description
Standby time = 8192 states
Standby time = 16384 states
Standby time = 32768 states
Standby time = 65536 states
Standby time = 131072 states
Standby time = 262144 states
Reserved
Standby time = 16 states (Setting prohibited)
¾
¾
,
L W R
¾
¾
) is retained or set to high-impedance state in the
¾
¾
Rev. 6.00 Feb 22, 2005 page 957 of 1484
REJ09B0103-0600
(Initial value)
(Initial value)

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