h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 828

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 21A ROM (H8S/2636 Group)
21A.9.3
Erase Mode
When erasing flash memory, the single-block erase flowchart shown in figure 21A-13 should be
followed.
The wait times after bits are set or cleared in the flash memory control register 1 (FLMCR1) and
the maximum number of erase operations (N) are shown in table 24-10 in section 24.1.7, Flash
Memory Characteristics.
To erase flash memory contents, make a 1-bit setting for the flash memory area to be erased in
erase block register 1 and 2 (EBR1, EBR2) at least (t
) µs after setting the SWE bit to 1 in
sswe
FLMCR1. Next, the watchdog timer (WDT) is set to prevent overerasing due to program runaway,
etc. Set a value greater than (t
) ms + (t
+ t
+ t
) µs as the WDT overflow period.
se
sesu
ce
cesu
Preparation for entering erase mode (erase setup) is performed next by setting the ESU bit in
FLMCR1. The operating mode is then switched to erase mode by setting the E bit in FLMCR1
after the elapse of at least (t
) µs. The time during which the E bit is set is the flash memory
sesu
erase time. Ensure that the erase time does not exceed (t
) ms.
se
Note: With flash memory erasing, preprogramming (setting all memory data in the memory to
be erased to all 0) is not necessary before starting the erase procedure.
Rev. 6.00 Feb 22, 2005 page 768 of 1484
REJ09B0103-0600

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