h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 190

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 5 Interrupt Controller
Table 5-10 Number of States in Interrupt Handling Routine Execution Statuses
Legend:
m: Number of wait states in an external device access.
5.5
5.5.1
When an interrupt enable bit is cleared to 0 to disable interrupts, the disabling becomes effective
after execution of the instruction.
In other words, when an interrupt enable bit is cleared to 0 by an instruction such as BCLR or
MOV, if an interrupt is generated during execution of the instruction, the interrupt concerned will
still be enabled on completion of the instruction, and so interrupt exception handling for that
interrupt will be executed on completion of the instruction. However, if there is an interrupt
request of higher priority than that interrupt, interrupt exception handling will be executed for the
higher-priority interrupt, and the lower-priority interrupt will be ignored.
The same also applies when an interrupt source flag is cleared to 0.
Figure 5-8 shows an example in which the TCIEV bit in the TPU’s TIER register is cleared to 0.
Rev. 6.00 Feb 22, 2005 page 130 of 1484
REJ09B0103-0600
Symbol
Instruction fetch
Branch address read
Stack manipulation
Usage Notes
Contention between Interrupt Generation and Disabling
S
S
S
I
J
K
Internal
Memory
1
2-State
Access
4
8 Bit Bus
Object of Access
3-State
Access
6 + 2m
External Device
2-State
Access
2
16 Bit Bus
3-State
Access
3 + m