h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 645

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
15.3.7
The interrupt request flag (IRIC) is set at different times depending on the WAIT bit in ICMR, the
FS bit in SAR, and the FSX bit in SARX. If the TDRE or RDRF internal flag is set to 1, SCL is
automatically held low after one frame has been transferred; this timing is synchronized with the
internal clock. Figure 15-19 shows the IRIC set timing and SCL control.
(a) When WAIT = 0, and FS = 0 or FSX = 0 (I
(c) When FS = 1 and FSX = 1 (synchronous serial format)
(b) When WAIT = 1, and FS = 0 or FSX = 0 (I
Section 15 I
IRIC Setting Timing and SCL Control
SCL
SDA
IRIC
User processing
SCL
SDA
IRIC
User processing
SCL
SDA
IRIC
User processing
Figure 15-19 IRIC Setting Timing and SCL Control
2
C Bus Interface [Option] (Only for the H8S/2638, H8S/2639, and H8S/2630)
8
8
7
7
7
7
8
8
8
8
Clear
IRIC
Clear IRIC
Clear IRIC
9
A
A
9
2
2
C bus format, no wait)
C bus format, wait inserted)
Clear
IRIC
Rev. 6.00 Feb 22, 2005 page 585 of 1484
Write to ICDR (transmit)
or read ICDR (receive)
Write to ICDR (transmit)
or read ICDR (receive)
Write to ICDR (transmit)
or read ICDR (receive)
1
1
1
1
1
1
REJ09B0103-0600

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