h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 706

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 Controller Area Network (HCAN)
HCAN bit rate calculation:
BCR Setting Constraints
These constraints allow the setting range shown in table 16-4 for TSEG1 and TSEG2 in BCR.
Rev. 6.00 Feb 22, 2005 page 646 of 1484
REJ09B0103-0600
1-bit time
Legend:
SYNC_SEG: Segment for establishing synchronization of nodes on the CAN bus (Normal bit
PRSEG:
PHSEG1:
PHSEG2:
Note: * The time quanta values of TSEG1 and TSEG2 become the value of TSEG + 1.
Bit rate =
f
Note: The BCR values are used for BRP, TSEG1, and TSEG2.
TSEG1 > TSEG2
CLK
Item
f
BRP
TSEG1
TSEG2
CLK
SYNC_SEG
: peripheral clock ( )
1
edge transitions occur in this segment).
Segment for compensating for physical delay between networks.
Buffer segment for correcting phase drift (positive). (This segment is extended
when synchronization (resynchronization) is established).
Buffer segment for correcting phase drift (negative). (This segment is
shortened when synchronization (resynchronization) is established).
2 × (BRP + 1) × (3 + TSEG1 + TSEG2)
Figure 16-6 Detailed Description of One Bit
SJW
Set Values
20 MHz
0 (B'000000)
4 (B'0100)
3 (B'011)
1-bit time (8 to 25 time quanta)
PRSEG
(SJW = 0 to 3)
f
CLK
Time segment 1
(TSEG1)*
2 to16
PHSEG1
Actual Values
—
System clock
5TQ
4TQ
Time segment 2
2
(TSEG2)*
PHSEG2
2 to 8
Quantum