h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 813

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bits 2, 1 and 0—Flash Memory Area Selection: These bits are used together with bit 3 to select
the flash memory area to be overlapped with RAM (See table 21A-7).
Table 21A-8 Flash Memory Area Divisions (H8S/2636)
*: Don't care
21A.7.6 Flash Memory Power Control Register (FLPWCR)
FLPWCR enables or disables a transition to the flash memory power-down mode when the LSI
switches to subactive mode * .
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
Bit 3: RAMS
0
1
Addresses
H'FFE000 to H'FFE3FF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
Initial value:
U-mask version only.
These functions cannot be used with the other versions.
R/W:
Bit:
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
PDWND
R/W
7
0
Block Name
RAM area 1 kbyte
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
—
R
6
0
—
R
5
0
RAMS
0
1
1
1
1
—
R
4
0
Rev. 6.00 Feb 22, 2005 page 753 of 1484
Section 21A ROM (H8S/2636 Group)
RAM2
*
0
0
1
1
—
R
3
0
RAM1
*
0
1
0
1
—
R
2
0
REJ09B0103-0600
—
R
1
0
RAM0
*
*
*
*
*
(Initial value)
—
R
0
0