h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 156

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 4 Exception Handling
4.2
4.2.1
A reset has the highest exception priority.
When the
reset initializes the internal state of the CPU and the registers of on-chip supporting modules.
Immediately after a reset, interrupt control mode 0 is set.
When the
The H8S/2636 can also be reset by overflow of the watchdog timer. For details see section 12,
Watchdog Timer.
4.2.2
This LSI enters reset state when the
To ensure that this LSI is reset, hold the
during operation, hold the
When the
exception handling as follows.
1. The internal state of the CPU and the registers of the on-chip supporting modules are
2. The reset exception handling vector address is read and transferred to the PC, and program
Figures 4-2 and 4-3 show examples of the reset sequence.
Rev. 6.00 Feb 22, 2005 page 96 of 1484
REJ09B0103-0600
initialized, the T bit is cleared to 0 in EXR, and the I bit is set to 1 in EXR and CCR.
execution starts from the address indicated by the PC.
Reset
Overview
Reset Sequence
R E S
R E S
R E S
pin goes low, all current operations are stopped, and this LSI enters reset state. A
pin goes from low to high, reset exception handling starts.
pin goes high after being held low for the necessary time, this LSI starts reset
R E S
pin low for at least 20 states.
R E S
R E S
pin goes low.
pin low for at least 20 ms at power-up. To reset

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