h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 689

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bit 9—Receive Message Interrupt Mask (IMR1): Enables or disables message reception
interrupt requests.
Bit 8—Reserved: The reset flag cannot be masked. This bit always reads 0. The write value
should always be 0.
Bits 7 to 5, 3, and 2—Reserved: These bits always read 1. The write value should always be 1.
Bit 4—Bus Operation Interrupt Mask (IMR12): Enables or disables interrupt requests due to
bus operation in sleep mode.
Bit 1—Unread Interrupt Mask (IMR9): Enables or disables unread receive message overwrite
interrupt requests.
Bit 0—Mailbox Empty Interrupt Mask (IMR8): Enables or disables mailbox empty interrupt
requests.
Bit 9: IMR1
0
1
Bit 4: IMR12
0
1
Bit 1: IMR9
0
1
Bit 0: IMR8
0
1
Description
Message reception interrupt request (RM1) to CPU by IRR1 enabled
Message reception interrupt request (RM1) to CPU by IRR1 disabled
Description
Bus operation interrupt request (OVR0) to CPU by IRR12 enabled
Bus operation interrupt request (OVR0) to CPU by IRR12 disabled
Description
Unread message overwrite interrupt request (OVR0) to CPU by IRR9
enabled
Unread message overwrite interrupt request (OVR0) to CPU by IRR9
disabled
Description
Mailbox empty interrupt request (SLE0) to CPU by IRR8 enabled
Mailbox empty interrupt request (SLE0) to CPU by IRR8 disabled
Section 16 Controller Area Network (HCAN)
Rev. 6.00 Feb 22, 2005 page 629 of 1484
REJ09B0103-0600
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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