h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 812

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 21A ROM (H8S/2636 Group)
Table 21A-7 Flash Memory Erase Blocks (H8S/2636)
21A.7.5 RAM Emulation Register (RAMER)
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER initialized to H'00 by a reset and in hardware
standby mode. It is not initialized by software standby mode. RAMER settings should be made in
user mode or user program mode.
Flash memory area divisions are shown in table 21A-8. To ensure correct operation of the
emulation function, the ROM for which RAM emulation is performed should not be accessed
immediately after this register has been modified. Normal execution of an access immediately
after register modification is not guaranteed.
Bits 7 and 6—Reserved: These bits always read 0.
Bits 5 and 4—Reserved: Only 0 may be written to these bits.
Rev. 6.00 Feb 22, 2005 page 752 of 1484
REJ09B0103-0600
Block (Size)
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
EB8 (32 kbytes)
EB9 (32 kbytes)
Initial value:
R/W:
Bit:
R
7
0
R
6
0
Addresses
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
H'001000 to H'007FFF
H'008000 to H'00BFFF
H'00C000 to H'00DFFF
H'00E000 to H'00FFFF
H'010000 to H'017FFF
H'018000 to H'01FFFF
R/W
5
0
R/W
4
0
RAMS
R/W
3
0
RAM2
R/W
2
0
RAM1
R/W
1
0
RAM0
R/W
0
0

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