h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 346

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 9 I/O Ports
Port F Data Register (PFDR)
PFDR is an 8-bit readable/writable register that stores output data for the port F pins (PF7 to PF3,
PF0).
PFDR is initialized to B'00000**0 by a reset, and in hardware standby mode. It retains its prior
state in software standby mode.
Port F Register (PORTF)
Note: * Determined by state of pins PF7 to PF3, PF0.
PORTF is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port F pins (PF7 to PF3, PF0) must always be performed on PFDR.
If a port F read is performed while PFDDR bits are set to 1, the PFDR values are read. If a port F
read is performed while PFDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTF contents are determined by the pin states, as
PFDDR and PFDR are initialized. PORTF retains its prior state in software standby mode.
Rev. 6.00 Feb 22, 2005 page 286 of 1484
REJ09B0103-0600
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Pin PF0 is setting a PFDDR bit to 1 makes the corresponding port F pin an output port, while
clearing the bit to 0 makes the pin an input port.
Mode 7
Setting a PFDDR bit to 1 makes the corresponding port F pin PF6 to PF3, PF0 an output port,
or in the case of pin PF7, the output pin. Clearing the bit to 0 makes the pin an input port.
:
:
:
:
PF7DR
R/W
PF7
— *
R
7
0
7
PF6DR
R/W
PF6
— *
R
6
0
6
PF5DR
R/W
PF5
— *
R
5
0
5
PF4DR
R/W
PF4
— *
R
4
0
4
PF3DR
R/W
PF3
— *
R
3
0
3
undefined undefined
undefined undefined
—
—
—
—
2
2
—
—
—
—
1
1
PF0DR
R/W
PF0
— *
R
0
0
0