h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 785

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
19.5
Contention between Buffer Register Write and Compare Match
If a PWBFR write is performed in the state immediately after a cycle register compare match, the
PWM output does not change, but as the duty register is also rewritten at the same time as the
buffer register, normal PWM output will not be achieved.
If a PWBFR write is performed in the state immediately after a cycle register compare match, the
buffer register and duty register are overwritten. PWM output changed by the cycle register
compare match is not changed in the overwrite of the duty register due to contention. This may
result in unanticipated duty output. In the case of channel 2, the duty register used as the transfer
destination is selected by the TDS bit of the buffer register when an overwrite of the duty register
occurs due to contention. This can also result in an unintended overwrite of the duty register.
Buffer register rewriting must be completed before automatic transfer by the DTC * (data transfer
controller), exception handling due to a compare match interrupt, or the occurrence of a cycle
register compare match on detection of the rise of CMF (compare match flag) in PWCR.
Note: * The DTC is not implemented in the H8S/2635 and H8S/2634.
Address
Write signal
PWCNT
(lower 10 bits)
PWBFR
PWDTR
PWM output
CMF
φ
Usage Note
Figure 19-12 PWM Channel 1 Operation
T
1
Buffer register address
N
Compare match
T
W
T
W
Rev. 6.00 Feb 22, 2005 page 725 of 1484
Section 19 Motor Control PWM Timer
N
T
0
2
M
M
REJ09B0103-0600

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