h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 39

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
4.3
4.4
4.5
4.6
4.7
Section 5 Interrupt Controller
5.1
5.2
5.3
5.4
5.5
5.6
4.2.3
4.2.4
Traces................................................................................................................................ 99
Interrupts........................................................................................................................... 100
Trap Instruction ................................................................................................................ 101
Stack Status after Exception Handling.............................................................................. 102
Notes on Use of the Stack................................................................................................. 103
Overview........................................................................................................................... 105
5.1.1
5.1.2
5.1.3
5.1.4
Register Descriptions........................................................................................................ 108
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Interrupt Sources............................................................................................................... 114
5.3.1
5.3.2
5.3.3
Interrupt Operation ........................................................................................................... 120
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
Usage Notes ...................................................................................................................... 130
5.5.1
5.5.2
5.5.3
5.5.4
5.5.5
5.5.6
DTC Activation by Interrupt............................................................................................. 133
5.6.1
5.6.2
Interrupts after Reset............................................................................................ 98
State of On-Chip Supporting Modules after Reset Release ................................. 99
Features................................................................................................................ 105
Block Diagram..................................................................................................... 106
Pin Configuration ................................................................................................ 107
Register Configuration......................................................................................... 107
System Control Register (SYSCR)...................................................................... 108
Interrupt Priority Registers A to H, J to M (IPRA to IPRH, IPRJ to IPRM) ....... 109
IRQ Enable Register (IER) .................................................................................. 110
IRQ Sense Control Registers H and L (ISCRH, ISCRL)..................................... 111
IRQ Status Register (ISR).................................................................................... 112
External Interrupts ............................................................................................... 114
Internal Interrupts ................................................................................................ 116
Interrupt Exception Handling Vector Table......................................................... 116
Interrupt Control Modes and Interrupt Operation................................................ 120
Interrupt Control Mode 0..................................................................................... 124
Interrupt Control Mode 2..................................................................................... 126
Interrupt Exception Handling Sequence .............................................................. 128
Interrupt Response Times .................................................................................... 129
Contention between Interrupt Generation and Disabling..................................... 130
Instructions that Disable Interrupts...................................................................... 131
Times when Interrupts Are Disabled ................................................................... 131
Interrupts during Execution of EEPMOV Instruction ......................................... 132
IRQ Interrupts...................................................................................................... 132
Notes on Use of NMI Interrupt............................................................................ 132
Overview.............................................................................................................. 133
Block Diagram..................................................................................................... 133
.......................................................................................... 105
Rev. 6.00 Feb 22, 2005 page xxxix of lx

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