MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 134
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
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System Integration Module (SIM)
9.3.1 External Pin Reset
9.3.2 Active Resets from Internal Sources
Data Sheet
134
NOTE:
The RST pin circuit includes an internal pull-up device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the SIM
reset status register (SRSR) is set as long as RST is held low for a
minimum of 67 ICLK cycles, assuming that neither the POR nor the LVI
was the source of the reset. See
Figure 9-4
All internal reset sources actively pull the RST pin low for 32 ICLK cycles
to allow resetting of external peripherals. The internal reset signal IRST
continues to be asserted for an additional 32 cycles (see
internal reset can be caused by an illegal address, illegal opcode, COP
timeout, LVI, or POR (see
For LVI or POR resets, the SIM cycles through 4096 + 32 ICLK cycles
during which the SIM forces the RST pin low. The internal reset signal
then follows the sequence from the falling edge of RST shown in
Figure
ICLK
RST
IAB
Freescale Semiconductor, Inc.
For More Information On This Product,
Reset Type
PC
All others
POR/LVI
9-5.
shows the relative timing.
Go to: www.freescale.com
Figure 9-4. External Reset Timing
Table 9-2. PIN Bit Set Timing
Figure
Number of Cycles Required to Set PIN
Table 9-2
9-6).
4163 (4096 + 64 + 3)
67 (64 + 3)
MC68HC908AP Family — Rev. 2.5
for details.
VECT H VECT L
Figure
MOTOROLA
9-5). An
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