MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 383

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

19.5 IRQ Module During Break Interrupts
19.6 IRQ Registers
MC68HC908AP Family — Rev. 2.5
MOTOROLA
NOTE:
When using the level-sensitive interrupt trigger, avoid false interrupts by
masking interrupt requests in the interrupt routine.
The IRQ1 pin has a permanent internal pullup device connected, while
the IRQ2 pin has an optional pullup device that can be enabled or
disabled by the PUC0ENB bit in the INTSCR2 register.
The BCFE bit in the SIM break flag control register (SBFCR) enables
software to clear the latch during the break state. (See
Break Module
To allow software to clear the IRQ latch during a break interrupt, write a
logic 1 to the BCFE bit. If a latch is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect CPU interrupt flags during the break state, write a logic 0 to
the BCFE bit. With BCFE at logic 0 (its default state), writing to the ACK
bit in the IRQ status and control register during the break state has no
effect on the IRQ interrupt flags.
Each IRQ is controlled and monitored by an status and control register.
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
IRQ1 Status and Control Register — $001E
IRQ2 Status and Control Register — $001C
Go to: www.freescale.com
(BRK).)
IRQ Module During Break Interrupts
External Interrupt (IRQ)
Section 23.
Data Sheet
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