MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 195
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
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11.9.1 TIM Status and Control Register
MC68HC908AP Family — Rev. 2.5
MOTOROLA
Address: T1SC, $0020 and T2SC, $002B
The TIM status and control register (TSC):
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
Reset:
Read:
Write:
•
•
•
•
•
This read/write flag is set when the TIM counter reaches the modulo
value programmed in the TIM counter modulo registers. Clear TOF by
reading the TIM status and control register when TOF is set and then
writing a logic 0 to TOF. If another TIM overflow occurs before the
clearing sequence is complete, then writing logic 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic
1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Figure 11-4. TIM Status and Control Register (TSC)
Bit 7
TOF
0
0
Go to: www.freescale.com
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
Timer Interface Module (TIM)
PS2
2
0
PS1
1
0
I/O Registers
Data Sheet
Bit 0
PS0
0
195
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